Introduction:
Members:
Lei Yang (Ph.D. candidate @ CQU and UCI)
Weiwen Jiang
Publications:
1.
Thermal-aware Task Mapping on Dynamically Reconfigurable Network-on-Chip based Multiprocessor System-on-Chip
W. Liu, L. Yang, W. Jiang, L. Feng, N. Guan, W. Zhang, and N. Dutt
IEEE Transactions on Computers (TC), Accepted, 2018.
2.
Work In Progress: Communication Optimization for Thermal Reliable Many-core Systems
W. Liu, L. Yang, W. Jiang and N. Guan
Proc. International Conference on Hardware/Software Co-design and System Synthesis (CODES+ISSS), Seoul, South Korea, Oct. 2017.
3.
FoToNoC: A Folded Torus-Like Network-on-Chip based Many-Core Systems-on-Chip in the Dark Silicon Era
L. Yang, W. Liu, W. Jiang, M. Li, P. Chen and E. H.-M. Sha
IEEE Transactions on Parallel and Distributed Systems (TPDS), 28(7), 1905-1918, 2017.
4.
Application Mapping and Scheduling for Network-on-Chip-Based MPSoC With Fine-Grain Communication Optimization
L. Yang, W. Liu, W. Jiang, M. Li, J. Yi and E. H. M. Sha
IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), 24(10), 3027-3040, Oct. 2016.
5.
FoToNoC: A hierarchical management strategy based on folded lorus-like Network-on-Chip for dark silicon many-core systems
(BEST PAPER NOMINATION)
L. Yang, W. Liu, W. Jiang , M. Li, J. Yi and E. H.-M. Sha
Proc. 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), Macao, Jan. 2016.
Hornor: